PhD: Cryogenic CMOS Design for Quantum Computing at SDU

The Institute of Mechanical and Electrical Engineering at SDU invites applications for a 3-year PhD position in Cryogenic CMOS Design. This exciting position offers the opportunity to join a cutting-edge research project at the intersection of microelectronics and quantum computing.

As the quantum computing field rapidly advances toward large-scale, fault-tolerant systems, one of the biggest challenges is the development of efficient, scalable, and low-noise control electronics that operate at cryogenic temperatures. This PhD project addresses this challenge by designing CMOS-based interfaces that can coherently control, bias, and read out quantum bits (qubits) in extreme low-temperature environments.

Research area and project description

As we move toward building fault-tolerant quantum computers, one of the major milestones is the development of high-quality quantum bits (qubits), the core units of quantum computation. Unlike classical bits, solid-state qubits must operate at extremely low temperatures, typically below 1 Kelvin, to reduce thermal noise, enable superconductivity, maintain quantum coherence, and minimize environmental interference.

Because of the size of the refrigeration systems needed to achieve these temperatures, the control cables connecting to the qubits are often more than 2 meters long. At the same time, a quantum computer powerful enough to solve problems beyond the reach of classical computers will require thousands, or even millions, of qubits. This creates a major engineering hurdle: interconnect complexity. Each qubit needs dedicated control and readout lines, which are usually routed from room temperature. Together, these issues make wiring a major obstacle on the path to practical, large-scale quantum computing.

While multiplexing can help reduce wiring to some extent, the most widely accepted solution to this challenge is to bring the control electronics closer to the qubits, placing them at cryogenic temperatures. CMOS technology stands out as a leading candidate for this role due to its advanced development, scalability, proven reliability, high performance, and ability to operate across a wide range of temperatures.

Work description

The appointed researcher will be involved in exploring the models, designing, and measureing CMOS-based interface (coherently control, readout, and biasing) to quantum bits:

• Conduct a thorough review of recent research in cryogenic electronics, CMOS behavior at cryogenic temperatures (4 K and below), and quantum hardware architectures (superconducting qubits and spin qubits).
• Collaborate with quantum physicists to interface CMOS circuits with real or simulated qubit systems.
• Understand the specific requirements and constraints of interfacing with qubits (control fidelity, noise sensitivity, power dissipation, etc.)
• Familiarize with standard CMOS modeling tools and limitations of traditional EDA tools at cryogenic temperatures.
• Define the system architecture of the quantum interface unit, including control, readout, and biasing functions.
• Establish performance metrics and specifications for sub-circuits (e.g., DACs, ADCs, amplifiers, switches, and oscillators) considering cryogenic constraints.
• Design, simulate, and tape-out key analog and mixed-signal building blocks (e.g., low-noise amplifiers, voltage/current sources, multiplexers, digital logic) for operation at cryogenic temperatures.
• Develop measurement setups for testing CMOS circuits at cryogenic temperatures (using dilution refrigerator). Perform low-temperature measurements of electrical parameters (gain, noise figure, linearity, etc.) and compare with simulations..

Qualifications

Applicants should hold an MSc in electronics, computer engineering, , Physics, or a closely related field.

Required Qualification:

• Solid background in analog/mixed-signal CMOS circuit design, including experience with amplifiers, data converters, and bias circuits.
• Experience with industry-standard EDA tools such as Cadence Virtuoso, Spectre, or Mentor Graphics.
• Understanding of semiconductor device physics, especially MOSFET operation, modeling, and scaling.
• Strong analytical and problem-solving skills, with the ability to work independently and in collaboration with multidisciplinary teams.
• Excellent verbal and written communication skills in English.

Preferred Qualifications:

• Familiarity with cryogenic electronics or experience working with low-temperature measurements (e.g., 4 K or below).
• Hands-on experience with layout and tape-out of CMOS chips.

For further information, please contactProfessor  Farshad Moradi, erinfarrellseanrobinsonmoradi@hunt-vasquez.dksdu.dkmiller-black.dk , Associate Professor Milad Zamani stephenramosramostimothymzamanitroy59@bolton.dksdu.dkcox.dkparker-patrick.dk , and Associate professor Yasser Rezaeiyan jessicasmithstevenlindseyyrez@holloway.dksdu.dkstevenson-martinez.dk

If you experience technical problems, please contact shepherdstephanierogersalexhcm-support@gordon-armstrong.dksmith.dksdu.dkburton.dk.

Application procedure

Before applying the candidates are advised to read the Faculty information for prospective PhD students and the SDU information on how to apply.

Assessment of the candidates is based on the application material, and an application must include:

• Motivated application.
• Curriculum Vitae.
• Master’s and bachelor’s degree certificates or equivalent, including transcripts of grades (copy of original/official English translation).
• Completed TEK PhD application form for 5+3 applicants. Find the form at the Faculty website.
• Completed TEK PhD form for calculation grade point average. Find the form at the Faculty website.
• An official document describing the grading scheme of the awarding universities (if not Danish).
• Only for applicants from programmes that evaluate thesis/examination project by approved/not approved: An official written assessment of the thesis or dissertation project from the grade giving institution. The statement must clearly state that the candidate has been among the top 30 pct. in the graduation class for the study programme.
• List of publications and maximum 2 examples of relevant publications (in case you have any publications).
• References may be included, you're welcome to use the form for reference letter at the Faculty website.
• A statement/documentation of other qualifications relevant to the position may also be included.

SUBMISSION GUIDE: Motivated application shall be uploaded as ‘Cover letter’ (max. 5 MB), Curriculum Vitae shall be uploaded as ‘Resume’ (max 5 MB). All other documents shall be uploaded as ‘Miscellaneous documents’ (max 10 files of max 50 MB per file).

All documents must be in English and PDF format. CPR number (civil registration no.) must be crossed out. All PDF-files must be unlocked and allow binding and may not be password protected.

The application deadline is September 15, 2025,at 11.59 PM / 23.59 (CET/CEST)

Assessment and selection process

Applications will be assessed by an assessment committee. Shortlisting may be applied, and only shortlisted candidates will receive a written assessment. Read about shortlisting at SDU. Interviews and tests may be part of the overall evaluation.

Read about the Assessment and selection process.

Conditions of enrollment/employment

Appointment as a PhD fellow is a 3-year salaried position, and the monthly gross salary incl. pension is 36.138 DKK. If you have relevant postgraduate experience, you may be placed on a higher salary step.

The start date will be agreed with the successful candidate.

Applicants must hold a master’s degree (equivalent to a Danish master's degree) at the time of enrollment and employment. Employment is contingent on enrollment approved by the PhD School. Enrollment will be in accordance with Faculty regulations and the Danish Ministerial Order on the PhD Programme at the Universities (PhD order). Employment will be in accordance with the collective agreement between the Ministry of Finance and the Danish Confederation of Professional Associations for academics in the state with the associated circular on the job structure for academic staff at Danish universities and the provisions for PhD fellows as described herein as well as the Protocol on PhD fellows signed by the Danish Ministry of Finance and the Danish Confederation of Professional Associations (AC). Further information about salary and conditions of employment. The person employed in the position may, based on a specific individual managerial evaluation, be exempted from time registration, also known as a “self-organizer”.

The University of Southern Denmark wishes our staff to reflect the surrounding community and therefore encourages everyone, regardless of personal background, to apply for the position. SDU conducts research in critical technologies, which, due to the risk of unwanted knowledge transfer, are subject to a number of security measures. Therefore, based on information from open sources, background checks may be conducted on candidates for the position.

Further information for international applicants about entering and working in Denmark. You may also visit WorkinDenmark for additional information.

Further information about The Faculty of Engineering.